Intel Xeon E5 2648l V3
By the Year
In 2024 there have been 0 vulnerabilities in Intel Xeon E5 2648l V3 . Xeon E5 2648l V3 did not have any published security vulnerabilities last year.
Year | Vulnerabilities | Average Score |
---|---|---|
2024 | 0 | 0.00 |
2023 | 0 | 0.00 |
2022 | 0 | 0.00 |
2021 | 2 | 6.70 |
2020 | 0 | 0.00 |
2019 | 0 | 0.00 |
2018 | 7 | 5.59 |
It may take a day or so for new Xeon E5 2648l V3 vulnerabilities to show up in the stats or in the list of recent security vulnerabilties. Additionally vulnerabilities may be tagged under a different product or component name.
Recent Intel Xeon E5 2648l V3 Security Vulnerabilities
Unchecked return value in the firmware for some Intel(R) Processors may
CVE-2021-0114
6.7 - Medium
- August 16, 2021
Unchecked return value in the firmware for some Intel(R) Processors may allow a privileged user to potentially enable an escalation of privilege via local access.
Insecure Default Initialization of Resource
Insecure default variable initialization for the Intel BSSA DFT feature may
CVE-2021-0144
6.7 - Medium
- July 14, 2021
Insecure default variable initialization for the Intel BSSA DFT feature may allow a privileged user to potentially enable an escalation of privilege via local access.
Insecure Default Initialization of Resource
Systems with microprocessors utilizing speculative execution and branch prediction may
CVE-2018-3693
5.6 - Medium
- July 10, 2018
Systems with microprocessors utilizing speculative execution and branch prediction may allow unauthorized disclosure of information to an attacker with local user access via a speculative buffer overflow and side-channel analysis.
Systems with microprocessors utilizing speculative execution and speculative execution of memory reads before the addresses of all prior memory writes are known may
CVE-2018-3639
5.5 - Medium
- May 22, 2018
Systems with microprocessors utilizing speculative execution and speculative execution of memory reads before the addresses of all prior memory writes are known may allow unauthorized disclosure of information to an attacker with local user access via a side-channel analysis, aka Speculative Store Bypass (SSB), Variant 4.
Side Channel Attack
Systems with microprocessors utilizing speculative execution and
CVE-2018-3640
5.6 - Medium
- May 22, 2018
Systems with microprocessors utilizing speculative execution and that perform speculative reads of system registers may allow unauthorized disclosure of system parameters to an attacker with local user access via a side-channel analysis, aka Rogue System Register Read (RSRE), Variant 3a.
Side Channel Attack
Systems with microprocessors utilizing speculative execution may
CVE-2018-9056
5.6 - Medium
- March 27, 2018
Systems with microprocessors utilizing speculative execution may allow unauthorized disclosure of information to an attacker with local user access via a side-channel attack on the directional branch predictor, as demonstrated by a pattern history table (PHT), aka BranchScope.
Information Disclosure
Systems with microprocessors utilizing speculative execution and branch prediction may
CVE-2017-5753
5.6 - Medium
- January 04, 2018
Systems with microprocessors utilizing speculative execution and branch prediction may allow unauthorized disclosure of information to an attacker with local user access via a side-channel analysis.
Side Channel Attack
Systems with microprocessors utilizing speculative execution and indirect branch prediction may
CVE-2017-5715
5.6 - Medium
- January 04, 2018
Systems with microprocessors utilizing speculative execution and indirect branch prediction may allow unauthorized disclosure of information to an attacker with local user access via a side-channel analysis.
Side Channel Attack
Systems with microprocessors utilizing speculative execution and indirect branch prediction may
CVE-2017-5754
5.6 - Medium
- January 04, 2018
Systems with microprocessors utilizing speculative execution and indirect branch prediction may allow unauthorized disclosure of information to an attacker with local user access via a side-channel analysis of the data cache.
Information Disclosure
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